# FPGA

## Mojo

 - [Mojo - An FPGA Beginner's Guide](https://embeddedmicro.com/tutorials/mojo-fpga-beginners-guide)
![Mojo pinout](https://www.nova-labs.org/wiki/_media/groups/fpga/mojo-v2-pinout-diagram.svg)

## Verilog

 - [Wikipedia page for Verilog](https://en.wikipedia.org/wiki/Verilog)
 - [Verilog design examples slides](http://csg.csail.mit.edu/6.375/6_375_2006_www/handouts/lectures/L03-Verilog-Design-Examples.pdf)
 - [Verilog fundamentals](https://cseweb.ucsd.edu/classes/sp11/cse141L/pdf/01/SV_Part_1.pdf)
 - [Difference among always_ff, always_comb, always_latch and always](https://stackoverflow.com/questions/23101717/difference-among-always-ff-always-comb-always-latch-and-always)
 - [Slides about verilog](http://www.diee.unica.it/eolab2/ESD/10/ED_TEO_06_verilog.pdf) talks a little about abstraction and syntax
 - [Learning FPGA And Verilog A Beginner’s Guide Part 1](https://docs.numato.com/kb/learning-fpga-verilog-beginners-guide-part-1-introduction/)
 - [Verilator](https://www.veripool.org/wiki/verilator) is the fastest free Verilog HDL simulator
 - [Verilog tutorials and examples](https://www.nandland.com/verilog/tutorials/index.html)
 - [Fixed point numbers](https://timetoexplore.net/blog/fixed-point-numbers-in-verilog)
 - [HDLBits — Verilog Practice](https://hdlbits.01xz.net)
 - [Tutorial by Zipcpu](http://zipcpu.com/tutorial/)

## Tests&Testbenches

 - [A Verilog HDL Test Bench Primer](https://people.ece.cornell.edu/land/courses/ece5760/Verilog/LatticeTestbenchPrimer.pdf)
 - [VUnit](https://vunit.github.io) unit testing framework for VHDL/SystemVerilog
 - [Using Verilog for Testbenches](http://www.syssec.ethz.ch/content/dam/ethz/special-interest/infk/inst-infsec/system-security-group-dam/education/Digitaltechnik_14/14_Verilog_Testbenches.pdf)

## CPU

 - [Compiling a CPU, in a cheap FPGA board](https://www.thanassis.space/myowncpu.html)
 - Interesting step to step implementation of a very simple CPU
    - [Your First CPU - Chapter 1 - Basic CPU](http://colinmackenzie.net/index.php?view=article&catid=12%3Ayfcpu&id=16%3Ayour-first-cpu-chapter-1-basic-cpu&tmpl=component&print=1&layout=default&page=&option=com_content&Itemid=6)
    - [Your First CPU - Chapter 2 - Branching](http://colinmackenzie.net/index.php?view=article&catid=12%3Ayfcpu&id=17%3Ayour-first-cpu-chapter-2-branching&tmpl=component&print=1&layout=default&page=&option=com_content&Itemid=6)
    - [Your First CPU - Chapter 3 - Your First Assembler](http://colinmackenzie.net/index.php?view=article&catid=12%3Ayfcpu&id=18%3Ayfcpu-ch3&tmpl=component&print=1&layout=default&page=&option=com_content&Itemid=6)
    - [Your First CPU - Chapter 4 - Pipelining](http://colinmackenzie.net/index.php?view=article&catid=12%3Ayfcpu&id=29%3Ayfcpupipelining&tmpl=component&print=1&layout=default&page=&option=com_content&Itemid=6)
  - [FPGA NES logs](https://hackaday.io/project/21496/logs) implementing NES CPU (the Ricoh 2A03)
  - [Microprocessor design](https://en.wikibooks.org/wiki/Microprocessor_Design)
  - [Simple CPU](https://www-users.cs.york.ac.uk/~mjf/simple_cpu/index.html)

# Clock domain

 - Crossing Clock Domains in an FPGA [video](https://www.youtube.com/watch?v=eyNU6mn_-7g)


## Links

 - [FPGA center](http://www.fpgacenter.com/)
 - [FPGA Design Elements](http://fpgacpu.ca/fpga/)
 - [FPGA4FUN](http://www.fpga4fun.com/)
 - [Opencore](http://opencores.org/): open source hardware IP-cores
 - [FPGA arcade](http://www.fpgaarcade.com/) site that recreates gaming and computing hardware from the past using FPGAs
 - [The Logic Space](https://eewiki.net/display/LOGIC/Home) This space contains logic examples and material for both programmable (FPGA and CPLD) as well as discrete logic designs.
 - [Parallel Programming for FPGAs](http://kastner.ucsd.edu/hlsbook/) is an open-source book aimed at teaching hardware and software developers how to efficiently program FPGAs using high-level synthesis (HLS)
 - [Video](https://www.youtube.com/watch?v=pDE2qenDXKQ) Lesson 1: Concept Guide and Step by Step Tutorial to Flash LEDs
 - [REAL-TIME FACE DETECTION AND TRACKING](https://people.ece.cornell.edu/land/courses/eceprojectsland/STUDENTPROJ/2012to2013/tnn7/index.html)
 - [FPGA NES](http://mil.ufl.edu/4924/projects/s12/final/King.pdf)
 - [VGA Character Generator on an FPGA](http://blog.andyselle.com/2014/12/04/vga-character-generator-on-an-fpga/)
 - [Makefile](http://www.excamera.com/sphinx/fpga-makefile.html) for building FPGA code
 - [Creating a Mojo project with Xilinx's ISE](http://www.glennsweeney.com/tutorials/mojo-fpga-tutorials/creating-a-mojo-project)
 - [FPGA getting started](https://www.kosagi.com/w/index.php?title=FPGA_getting_started)
 - [Spartan-6 Libraries Guide for HDL Designs](http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_4/spartan6_hdl.pdf)
 - [Spartan-6 FPGA SelectIO Resources](http://www.xilinx.com/support/documentation/user_guides/ug381.pdf)
 - [Spartan 6 1080p](http://hamsterworks.co.nz/mediawiki/index.php/Spartan_6_1080p)
 - [Clocking wizard and clock buffer](https://embeddedmicro.com/forum/viewtopic.php?t=3031)
 - [Generate a 100 Hz Clock from a 50 MHz Clock in Verilog](http://electronics.stackexchange.com/questions/137114/generate-a-100-hz-clock-from-a-50-mhz-clock-in-verilog)
 - RAMs – FIFOs - Coregen [slide](https://agenda.infn.it/getFile.py/access?resId=4&materialId=slides&confId=6549)
 - [FPGA clocking schemes](http://ue.pwr.wroc.pl/pld/pld_10.pdf)
 - [SD card](https://fpga4fun.com/SD.html)
 - [Some FPGA projects](http://hamsterworks.co.nz/mediawiki/index.php/FPGA_Projects)
 - [The Fastest, Easiest FPGA Blinker, Ever!](http://www.xess.com/static/media/pages/pygmyhdl/examples/1_blinker/fastest_easiest_FPGA_blinker_ever.html)
 - [Keep it synchronous stupid](https://www.doulos.com/knowhow/fpga/synchronisation/)
 - [Blog](http://svenand.blogdrives.com) with posts about FPGA design from scratch
 - [My first experience with Formal Methods](http://zipcpu.com/blog/2017/10/19/formal-intro.html)
 - [The Hobbyists Guide to FPGAs](https://hackaday.io/project/27550-the-hobbyists-guide-to-fpgas)
 - [https://github.com/m-labs/migen](migen): [Hello World for FPGA (in Migen)](https://reconfig.io/2018/05/hello_world_migen)

## Controllers

 - [sdram_ctrl](https://github.com/skristiansson/wb_sdram_ctrl/blob/master/rtl/verilog/sdram_ctrl.v)
 - [SDRAM controller](https://www.joshbassett.info/sdram-controller/)
 - [CSI ctrl](https://github.com/daveshah1/CSI2Rx/blob/master/verilog_cores/csi/rx_packet_handler.v)
 - [Is AXI too complicated?](https://www.reddit.com/r/FPGA/comments/egkrce/is_axi_too_complicated/)
 - [hdl-util/hdmi](https://github.com/hdl-util/hdmi/) Send video/audio over HDMI on an FPGA
 - [avakar/usbcorev](https://github.com/avakar/usbcorev) A full-speed device-side USB peripheral core written in Verilog.